1. Field of the Invention
The present invention relates to an organic electroluminescence display device and a method of manufacturing the same, and more particularly, to an organic electroluminescence display device that can be formed with a large size screen and can prevent non-uniform brightness of a panel using an auxiliary power line to prevent a voltage drop of a power line and an upper electrode and a method of manufacturing the same.
2. Description of the Related Art
Since organic electroluminescence display (OELD) devices are emissive display devices that emit light by electrically exciting an organic fluorescent compound, can be driven at a low driving voltage, are slim and lightweight, and have a wide viewing angle and a quick response time, they are expected to solve the problems of and replace liquid crystal display devices.
An OELD device generally includes an organic film (or layer) formed in a predetermined pattern and placed on a transparent insulating substrate formed of glass or other material and electrodes formed on and under the organic film. The organic film is formed of an organic compound. In the above structure of the OELD device, when a positive voltage and a negative voltage are applied to the electrodes, holes migrate to a light emitting layer via a hole transport layer (HTL) from the electrode to which the positive voltage is applied, electrons migrate to the light emitting layer via an electron transport layer (ETL) from the electrode to which the negative voltage is applied. Excitons are generated by combining the holes and electrons in the light emitting layer and the excitons change to a ground state while being excited. Thus, an image is formed by light emitted from fluorescent molecules of the light emitting layer.
An active matrix (AM) organic electroluminescence display device includes at least two thin film transistors (TFTs) in each pixel. The TFTs are used as a switching device that controls the operation of the pixel and a driving device that drives the pixel. The TFTs have a semiconductor active layer having source and drain regions doped with a high concentration of dopant and a channel region formed between the source and drain regions. The TFT is composed of a gate insulating layer formed on the semiconductor active layer, a gate electrode formed on the gate insulating layer on the channel region of the semiconductor active layer, and, on the gate electrode, drain and source electrodes which are connected to the source and drain regions via contact holes through an inter-insulator.
FIG. 1 is a plan view of a pixel of an AM OELD device, and FIG. 2 is a cross-sectional view of the pixel of FIG. 1.
Referring to FIG. 1, the AM OELD device includes a plurality of sub-pixels. Each sub-pixel is arranged in a pixel region defined by a scan line (Scan), a data line (Data), and a driving line (VDD), and each of the sub-pixels can be simply formed of at least two TFTs, such as a switching TFT (TFTsw) and a driving TFT (TFTdr), one capacitor (Cst), and one organic light emitting diode (OLED). The numbers of TFTs and capacitor are not limited to two and one, respectively, and more than two TFTs and more than one capacitor can be included.
The switching TFT (TFTsw) transmits data signals applied to the data line Data by being driven by scanning signals applied to the scan line (Scan). The driving TFT (TFTdr) determines the amount of current inputted to the OLED through the power line VDD according to the data signals transmitted from the switching TFT (TFTsw), that is, a voltage difference Vgs between the gate and the source. The capacitor (Cst) stores data signals transmitted through the switching TFT (TFTsw) during one image frame.
FIG. 2 is a cross-sectional view of the pixel of FIG. 1. In FIG. 2, only an OELD and a TFT driving the OLED are illustrated.
Referring to FIG. 2, a buffer layer 110 is formed on a glass substrate 100, and a TFT and an OLED are formed on the buffer layer 110.
A semiconductor active layer 121 is formed in a predetermined pattern on the buffer layer 110 on the substrate 100. A gate insulating layer 130 formed of SiO2 is formed on the semiconductor active layer 121, and a gate electrode 141 as a conductive film formed of MoW or Al/Cu is formed on the gate insulating layer 130. As depicted in FIG. 1, the gate electrode 141 is connected to one of an upper or a lower electrode of the capacitor (Cst).
An inter-insulator 150 is formed on the gate electrode 141, and the source and drain electrodes 161 are respectively connected to source and drain regions (not shown) in the semiconductor active layer 121 via contact holes. The power line VDD is also formed on the inter-insulator 150 when the source and drain electrodes 161 are formed. A passivation film 170 formed of SiO2 or SiNx is formed on the source and drain electrodes 161 and a planarizing film 175 formed of an organic material such as acryl, polyimide, or BCB is formed on the passivation film 170.
Via-holes 175a and 170a connected to the source and drain electrodes 161 are formed in the passivation film 170 and the planarizing film 175 by photolithography or perforation. A lower electrode layer 180 that acts as an anode is formed on the planarizing film 175 and is connected to the source and drain electrodes 161. A pixel defining layer 185 formed of an organic material covering the lower electrode layer 180 is formed. After forming a predetermined opening in the pixel defining layer 185, an organic layer 190 is formed in a region defined by the opening. The organic layer 190 includes a light emitting layer. Next, an upper electrode layer 195, which acts as a cathode is formed to cover the organic layer 190. A portion of the organic layer 190 where the lower electrode layer 180 faces the upper electrode layer 195 emits light by receiving holes and electrons.
Conventionally, in the AM OELD device, a transparent cathode is used for emitting light toward a direction of a sealed substrate. Generally, the transparent cathode is formed of a transparent conductive material such as ITO or IZO. However, to function as a cathode, after thinly depositing a semitransparent metal film using a metal having low work function, such as MgAg, on a side that contacts the organic film, a thick transparent conductive film formed of ITO or IZO is deposited on the semitransparent metal film.
In a conventional method of manufacturing the OELD device, the transparent conductive film is formed after forming the organic film 190. At this time, the transparent conductive film is formed using a low temperature deposition process to minimize the damage of the organic film by heat or plasma. Therefore, the transparent conductive film has poor film quality and has a high specific resistance.
When the specific resistance of a cathode is high, a non-uniform cathode voltage can be applied to the pixels and can generate a voltage difference between a location close to the power supply point and a location remote from the power supply point due to a voltage drop. The voltage difference can cause non-uniform brightness and image characteristics, and increases power consumption. The voltage drop is also a reason that makes it difficult to manufacture a large size AM OELD device.
To solve this problem, Shoji Terada et al. have introduced a method of forming an auxiliary electrode for preventing a voltage drop of the upper electrode on a pixel defining layer 285 in 54.5L, SID2003 (Society for Information Display International Symposium, Seminar & Exhibition, Session 54, May 18-23, 2003, Baltimore, Md.). The OELD device depicted in FIG. 1 has a structure in which an auxiliary electrode line 193 for preventing a voltage drop of the upper electrode is formed on the pixel defining layer 185 and the upper electrode 195 that acts as a cathode and is formed on an entire surface of the insulating substrate 100 contacts the auxiliary electrode line 193.
However, the OELD device can solve the problem of non-uniform brightness caused by the voltage drop by forming the auxiliary electrode line 193 but has drawbacks in that the organic film 190 can be damaged when forming the auxiliary electrode line 193 by patterning after forming the semitransparent metal film on the pixel defining layer 185. Also, this process is complicated since a mask process for forming the auxiliary electrode line 193 is added.
On the other hand, the power line (VDD) that inputs a current to the source and drain electrodes 161 is simultaneously formed and connected to the source and drain electrodes 161 when forming the source and drain electrodes 161. However, in the TFT structure, the wiring resistance is high due to a small cross-sectional area of the wiring since the wiring of the power line (VDD) is supplied from a side of the substrate. Therefore, the amount of current supplied to the driving TFT (TFTdr) is non-uniform due to an RC delay and voltage drop resulting in the non-uniform brightness of the OELD device.
As described above, due to the voltage drops in the power line (VDD) and cathode, the manufacturing of a large size AM OELD device is difficult.